THE VLSI HOMEPAGE

A Practical guide to VLSI Design and Verification..

Verilog X

Posted in Digital Design by Nigam on the September 16th, 2008

I found an interesting paper on the dangerous Verilog ‘X’ semantics, it’s interpretation by simulation/synthesis tools and how to avoid any bugs lurking in the design with a list of recommendations.

You can find the paper at the link here - The Dangers of Living with an X by Mike Turpin

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