Primetime Reports Generation
Primetime offers several constructs to report design statistics such as clocks, max fanout, transition and capacitance, constraint checks and timing. This post will cover constructs that are used often to extract useful information from Primetime for design analysis.
Design Information
- report_design provides a summary on operating conditions, derating factors, wire load models, and design rules like maximum capacitance, transition and fanout.
- report_clock provides a summary of all clocks in the design including generated clocks with their sources and their attributes (propagated or ideal clocks).
- report_disable_timing provides a summary of all the timing arcs that are disabled in the design.
- report_case_analysis reports all the nets or pins that are constrained to appropriate values for proper propagation.
Constraint Checking
- check_timing -verbose is a powerful construct in Primetime and is recommended to run on all designs to check the constraints. Primetime can report unconstrained clocks in the design, combinational timing loops, inputs or outputs that are not constrained, multiple clocks clocking the same flop or flops that do not have a clock defined on them. This aids the designer to identify incorrect or undefined constraints earlier in the cycle.
- report_constraint generates a summary of all the constraint violations including setup/hold and the amount by which the design violates the constraint. Usage and offers available in this construct are
report_constraint -all_violators -verbose
By default, report_constraint generates all the violations in the design and the reports can be segregated by using appropriate switches. For example, to report only max fanout violations, a -max_fanout switch can be added.
report_constraint -all_violators -verbose -max_fanout
report_constraint -all_violators -verbose -max_delay
report_constraint -all_violators -verbose -min_delay
report_constraint -all_violators -verbose -max_capacitance
report_constraint -all_violators -verbose -recovery
report_constraint -all_violators -verbose -removal
Timing Reports
- report_timing reports design timing information for each path group (or clock group) and offers several switches to segregate the timing results based on max delay, min delay, recovery, removal etc. The level of detail that can be viewed in the reports can also be customized. Simple syntax for this construct is
# To report timing from one clock group to another (max_delay, setup)
report_timing -from [get_clocks clk1] -to [get_clocks clk2] -delay max
# To report flop to flop timing (min_delay timing, hold)
report_timing -from [get_pins my_count_lden_reg/clk] -to [get_pins count_0_reg/lden] -delay min
# Detailed timing report that traces clocks at both launch and capture flops with all nets, input pins and a maximum of 1000 paths.
report_timing -from [get_clocks clk] -to [get_clocks clk] -path full_clock_expanded -nets \
-input_pins -capacitance -transition -max_paths 1000 -nworst 100 -delay max
Switches that are often used in report_timing include
report_timing # Report timing paths
[-from from_list] (From pins, ports, nets, or clocks)
[-rise_from rise_from_list] (Rising from pins, ports, nets, or clocks)
[-fall_from fall_from_list] (Falling from pins, ports, nets, or clocks)
[-through through_list] (Through pins, ports, or nets)
[-to to_list] (To pins, ports, nets, or clocks)
[-rise_to rise_to_list] (Rising to pins, ports, nets, or clocks)
[-fall_to fall_to_list] (Falling to pins, ports, nets, or clocks)
[-delay_type delay_type] (Type of path delay:
Values: max, min, min_max, max_rise, max_fall, min_rise, min_fall)
[-nworst paths_per_endpoint] (List N worst paths to endpoint:Value >= 1)
[-max_paths count] (Maximum number of paths per path group to output: Value >= 1)
[-path_type format] (Format for path report:Values: full, full_clock, short, end, summary, full_clock_expanded)
[-input_pins] (Show input pins in path)
[-nets] (List net names)
[-transition_time] (Display transition time for each pin)
[-capacitance] (Display total capacitance for each net)
[-slack_lesser_than slack_limit] (Display paths with slack less than this)
[-slack_greater_than slack_limit] (Display paths with slack greater than this)
Example timing reports can be found in Matt Weber’s paper on OCV in the Recommended Reading section
Sphere: Related Content
on February 12th, 2008 at 9:04 am
How is this information new? Anybody with access to the PrimeTime UserGuide or man pages can read up on the above topics.
It would be more interesting to see how you did clocking (pulsed clocks, latch based design) on a real design.
Why did your design have multiple clocks?
-R
on March 17th, 2008 at 5:27 am
hi R,
The last two posts are related to primetime flow and the tool’s capabilities - more for novices.
I am planning to post a few STA articles on real designs with DDR2, SERDES etc. I have not got around to doing that
-Nigam
on June 3rd, 2008 at 7:00 am
Hi,
STA topics are well explained and are intresting SSTA is very good, i would like to request please keep viewing freshers it would be help full if u upload PT example report and explain how to claculate frequency and skew from max reports etc …