http://vlsihomepage.com/2007/10/18/arrays-in-systemverilog/ A Practical guide to VLSI Design and Verification.. Mon, 06 Sep 2010 17:06:08 +0000 http://wordpress.org/?v=2.2.2 http://vlsihomepage.com/2007/10/18/arrays-in-systemverilog/#comment-1769 Richard Tue, 24 Feb 2009 19:02:56 +0000 http://vlsihomepage.com/2007/10/18/arrays-in-systemverilog/#comment-1769 I need to create and access a 2-dimensional array, where 1 of the dimensions is a dynamic array and the other is an unpacked array. For ex., logic [7:0] wrdata[][200]. Is this correct? I have a separate dynamic array that I want to assign to the dynamic part of the 2-dimensional array: logic [7:0] wr_data[]; int blen = 64; wr_data = new[blen]; Then I want to new and access the 2-d array - is this correct?: for (int i=0; i I need to create and access a 2-dimensional array, where 1 of the dimensions is a dynamic array and the other is an unpacked array. For ex.,
logic [7:0] wrdata[][200]. Is this correct?
I have a separate dynamic array that I want to assign to the dynamic part of the 2-dimensional array:
logic [7:0] wr_data[];
int blen = 64;
wr_data = new[blen];
Then I want to new and access the 2-d array - is this correct?:
for (int i=0; i

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