Comments on: Setup and Hold times http://vlsihomepage.com/2007/09/13/setup-and-hold-times/ A Practical guide to VLSI Design and Verification.. Mon, 06 Oct 2008 16:47:36 +0000 http://wordpress.org/?v=2.2.2 By: Nigam http://vlsihomepage.com/2007/09/13/setup-and-hold-times/#comment-332 Nigam Tue, 22 Apr 2008 06:21:55 +0000 http://vlsihomepage.com/2007/09/13/setup-and-hold-times/#comment-332 Aravind, You are right, a typo. I will correct this. thanks. Aravind,

You are right, a typo. I will correct this.

thanks.

]]> By: aravind http://vlsihomepage.com/2007/09/13/setup-and-hold-times/#comment-284 aravind Mon, 07 Apr 2008 09:36:32 +0000 http://vlsihomepage.com/2007/09/13/setup-and-hold-times/#comment-284 hi...in the equation for data required time in the second case "Data Required time = (half_clock_period + clock insertion delay + Ck->Q delay of flop A - Setup time required for flop B)" I think "Ck->Q delay of flop A" variable should be replaced with "Clock skew" variable. hi…in the equation for data required time in the second case “Data Required time = (half_clock_period + clock insertion delay + Ck->Q delay of flop A - Setup time required for flop B)” I think “Ck->Q delay of flop A” variable should be replaced with “Clock skew” variable.

]]> By: Nigam http://vlsihomepage.com/2007/09/13/setup-and-hold-times/#comment-195 Nigam Mon, 17 Mar 2008 05:30:15 +0000 http://vlsihomepage.com/2007/09/13/setup-and-hold-times/#comment-195 Thanks Sunil, happy to hear that. Thanks Sunil, happy to hear that.

]]> By: Sunil http://vlsihomepage.com/2007/09/13/setup-and-hold-times/#comment-167 Sunil Sun, 09 Mar 2008 13:04:20 +0000 http://vlsihomepage.com/2007/09/13/setup-and-hold-times/#comment-167 Thanks its really amazing explanation easy understand Thnx lot Thanks its really amazing explanation easy understand
Thnx lot

]]> By: Input and Output delays in Primetime | THE VLSI HOMEPAGE http://vlsihomepage.com/2007/09/13/setup-and-hold-times/#comment-5 Input and Output delays in Primetime | THE VLSI HOMEPAGE Tue, 25 Sep 2007 15:14:55 +0000 http://vlsihomepage.com/2007/09/13/setup-and-hold-times/#comment-5 [...] the review of setup and hold time analysis in previous post, we will now cover timing analysis at the primary pins of the chip. The IO pins [...] […] the review of setup and hold time analysis in previous post, we will now cover timing analysis at the primary pins of the chip. The IO pins […]

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